Hardware and firmware that do the thinking at the edge. Our flagship is a silicon IP core that cuts the data a sensor sends to its host by up to five times — in the wire, at line rate, before a CPU ever sees it.
Every sensor, radio, and camera now produces more raw data than the system behind it can afford to move, store, or think about. Host CPUs spend their power and memory bandwidth throwing most of it away.
We believe the first level of processing belongs where the data enters the system — the way a nervous system filters before the brain gets involved.
That belief is now silicon, in two cores. The Context Aware Fabric IP does it for data in motion. Processor-free control does it for the sensor itself, collapsing the decision into the circuit so neither a processor nor a battery is needed at all. Around both we build the devices and embedded systems that put them to work.
A hardware IP core that sits between the wire and the host and reduces a raw data stream to what matters — at full line rate, with no software in the path. Targeting up to five times less data with negligible loss of accuracy, which means less host memory, less data-movement power, and lower latency.
Anyone whose host is drowning in sensor data: data-acquisition systems, RF front ends, cameras, and industrial monitors. Ethernet first, with PCIe and CXL fabrics to follow. Delivered as licensable RTL for SoC and FPGA teams, with verification and integration support.
Our second core: sense, decide, and actuate entirely in analog and discrete hardware, with no processor and no firmware in the loop. The decision logic is the circuit. That removes the firmware supply chain, the patch cycle, and the software attack surface, and the circuit runs on harvested energy, so there is no battery to charge, replace, or service. It goes where nobody can reach the device again: sealed instruments, implanted and body-worn devices, remote sensors, and orbital hardware. First device in build is a pressure-sensing device for eye health.
We build where the environment is unforgiving and the cost of a field failure is high: data server platforms, space systems, and industrial hardware. Board design, firmware, connectivity, secure architecture, manufacturing readiness, and the qualification work that decides whether the unit still works after launch, after a year in a rack, or after ten thousand of them ship.
A conventional sensor node needs a processor to decide and a battery to run. Those are the parts that fail, the parts that need servicing, and the parts that decide where the device can be put at all.
Processor-free control removes both. The decision is the circuit, and the circuit runs on energy it harvests. What is left is a device that can be sealed, implanted, buried, or launched, and then left alone.
That is a different market from the Context Aware Fabric IP. The Fabric sells where a host is drowning in data. This core sells where nobody can reach the device again.
| Context Aware Fabric IP | Evaluate on FPGA with your own data stream, then license the IPRTL, verification suite, and integration support included |
|---|---|
| Processor-free, battery-free control | Licensing, or co-development on your applicationReference device through pilot |
| Embedded engineering | Fixed-scope engagements from board bring-up to productionYou own every design file at hand-off |
| Support | Engineering support from the people who designed each productNot a reseller — the designers themselves |
We work with a small number of partners each year. The right first step is usually a conversation. Or look at how we validate.
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